The ON resistance of a vertical power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) strongly depends on the electrical resistance of the conductive layer (the drift layer) portion. The doping concentration that determines the electrical resistance of the drift layer cannot exceed a limitation according to the breakdown voltage of the pn junction formed by the base layer and the drift layer. Therefore, a trade-off relationship exists between the device breakdown voltage and the ON resistance. It is important to improve such a trade-off relationship in low power-consumption devices. Some limitations of the trade-off relationship are determined by the device materials; and overcoming such limitations may lead to the realization of low ON-resistance devices superior to conventional power devices.
One known example of a MOSFET improves the trade-off relationship by providing a structure called a super junction structure made of p-type pillar layers and n-type pillar layers in the drift layer. The super junction structure realizes a low ON resistance superior to that of material limitations by providing current through a highly-doped n-type pillar layer while maintaining a high breakdown voltage by artificially making a non-doped layer by equalizing the charge amount (the impurity amount) between the p-type pillar layer and the n-type pillar layer.
Although it is possible to improve the trade-off relationship between the ON resistance and device breakdown voltage to overcome the material limitations by using such a super junction structure, it is necessary to use a narrow lateral period of the super junction structure to increase the impurity amounts of the p-type pillar layer and the n-type pillar layer and reduce the ON resistance. In the case where the impurity amounts of the p-type pillar layer and the n-type pillar layer are increased without using a narrow lateral period, the lateral electric field increases due to full depletion of the super junction structure; and the vertical electric field that determines the breakdown voltage undesirably decreases. Therefore, the breakdown voltage undesirably decreases with the ON resistance.
The narrow lateral period of the super junction structure is indispensable to reduce the ON resistance while maintaining the high breakdown voltage. However, processes to reduce the lateral period of the super junction structure unfortunately become complex. Even if the lateral period can be made narrow, increasing the impurity amount causes a breakdown voltage decrease to occur easily due to fluctuation of the impurity amount. To solve such problems, for example, a power semiconductor device has been disclosed in which the impurity concentration of the p-type pillar layer is reduced deeper in the vertical direction.
Although the discussed power semiconductor device having a sloping profile increases the manufacturing process margin regarding the fluctuation of the impurity amount, difficulties remain for controlling the impurity amount because it is necessary to form an impurity concentration distribution having a slope in the vertical direction.
In a power transistor in which a channel MOS and a drift capacitor are stacked perpendicularly in a trench, it has been discussed that stress is induced in silicon (an n-type epitaxial layer) by a silicon oxide film of the trench capacitor; and higher mobility in the stress-induced silicon and a lower resistance have been observed.